此内容没有您所选择的语言版本。

29.2.2. Setting Events to Monitor


Most processors contain counters, which are used by OProfile to monitor specific events. As shown in Table 29.2, “OProfile Processors and Counters”, the number of counters available depends on the processor.
Table 29.2. OProfile Processors and Counters
Processor cpu_type Number of Counters
AMD64 x86-64/hammer 4
AMD Athlon i386/athlon 4
AMD Family 10h x86-64/family10 4
AMD Family 11h x86-64/family11 4
AMD Family 12h x86-64/family12 4
AMD Family 14h x86-64/family14 4
AMD Family 15h x86-64/family15 6
IBM eServer System i and IBM eServer System p timer 1
IBM POWER4 ppc64/power4 8
IBM POWER5 ppc64/power5 6
IBM PowerPC 970 ppc64/970 8
IBM S/390 and IBM System z timer 1
Intel Core i7 i386/core_i7 4
Intel Nehalem microarchitecture i386/nehalem 4
Intel Pentium 4 (non-hyper-threaded) i386/p4 8
Intel Pentium 4 (hyper-threaded) i386/p4-ht 4
Intel Westmere microarchitecture i386/westmere 4
TIMER_INT timer 1
Use Table 29.2, “OProfile Processors and Counters” to verify that the correct processor type was detected and to determine the number of events that can be monitored simultaneously. timer is used as the processor type if the processor does not have supported performance monitoring hardware.
If timer is used, events cannot be set for any processor because the hardware does not have support for hardware performance counters. Instead, the timer interrupt is used for profiling.
If timer is not used as the processor type, the events monitored can be changed, and counter 0 for the processor is set to a time-based event by default. If more than one counter exists on the processor, the counters other than counter 0 are not set to an event by default. The default events monitored are shown in Table 29.3, “Default Events”.
Table 29.3. Default Events
Processor Default Event for Counter Description
AMD Athlon and AMD64 CPU_CLK_UNHALTED The processor's clock is not halted
AMD Family 10h, AMD Family 11h, AMD Family 12h CPU_CLK_UNHALTED The processor's clock is not halted
AMD Family 14h, AMD Family 15h CPU_CLK_UNHALTED The processor's clock is not halted
IBM POWER4 CYCLES Processor Cycles
IBM POWER5 CYCLES Processor Cycles
IBM PowerPC 970 CYCLES Processor Cycles
Intel Core i7 CPU_CLK_UNHALTED The processor's clock is not halted
Intel Nehalem microarchitecture CPU_CLK_UNHALTED The processor's clock is not halted
Intel Pentium 4 (hyper-threaded and non-hyper-threaded) GLOBAL_POWER_EVENTS The time during which the processor is not stopped
Intel Westmere microarchitecture CPU_CLK_UNHALTED The processor's clock is not halted
TIMER_INT (none) Sample for each timer interrupt
The number of events that can be monitored at one time is determined by the number of counters for the processor. However, it is not a one-to-one correlation; on some processors, certain events must be mapped to specific counters. To determine the number of counters available, execute the following command:
~]# ls -d /dev/oprofile/[0-9]*
The events available vary depending on the processor type. To determine the events available for profiling, execute the following command as root (the list is specific to the system's processor type):
~]# ophelp

Note

Unless OProfile is be properly configured, the ophelp fails with the following error message:
Unable to open cpu_type file for reading
Make sure you have done opcontrol --init
cpu_type 'unset' is not valid
you should upgrade oprofile or force the use of timer mode
To configure OProfile, follow the instructions in Section 29.2, “Configuring OProfile”.
The events for each counter can be configured via the command line or with a graphical interface. For more information on the graphical interface, see Section 29.9, “Graphical Interface”. If the counter cannot be set to a specific event, an error message is displayed.
To set the event for each configurable counter via the command line, use opcontrol:
~]# opcontrol --event=event-name:sample-rate
Replace event-name with the exact name of the event from ophelp, and replace sample-rate with the number of events between samples.

29.2.2.1. Sampling Rate

By default, a time-based event set is selected. It creates a sample every 100,000 clock cycles per processor. If the timer interrupt is used, the timer is set to whatever the jiffy rate is and is not user-settable. If the cpu_type is not timer, each event can have a sampling rate set for it. The sampling rate is the number of events between each sample snapshot.
When setting the event for the counter, a sample rate can also be specified:
~]# opcontrol --event=event-name:sample-rate
Replace sample-rate with the number of events to wait before sampling again. The smaller the count, the more frequent the samples. For events that do not happen frequently, a lower count may be needed to capture the event instances.

Warning

Be extremely careful when setting sampling rates. Sampling too frequently can overload the system, causing the system to appear as if it is frozen or causing the system to actually freeze.

29.2.2.2. Unit Masks

Some user performance monitoring events may also require unit masks to further define the event.
Unit masks for each event are listed with the ophelp command. The values for each unit mask are listed in hexadecimal format. To specify more than one unit mask, the hexadecimal values must be combined using a bitwise or operation.
~]# opcontrol --event=event-name:sample-rate:unit-mask
Red Hat logoGithubRedditYoutubeTwitter

学习

尝试、购买和销售

社区

关于红帽文档

通过我们的产品和服务,以及可以信赖的内容,帮助红帽用户创新并实现他们的目标。

让开源更具包容性

红帽致力于替换我们的代码、文档和 Web 属性中存在问题的语言。欲了解更多详情,请参阅红帽博客.

關於紅帽

我们提供强化的解决方案,使企业能够更轻松地跨平台和环境(从核心数据中心到网络边缘)工作。

© 2024 Red Hat, Inc.